Nvidia releases graphics-related details of its GF100 chip

Nvidia releases graphics-related details of its GF100 chip

Nvidia recently revealed the graphics-related details of its Fermi graphics architecture-based chip code-named GF100 – ‘Graphics Fermi 100.’ Equipped with all DirectX 11 features, the new Nvidia chip, as per indications, will be 60-70 percent bigger than the ‘Cypress’ chip in the ATI Radeon HD 5870.

According to the information forwarded by Nvidia, the GF100 is chiefly divided into four key “graphics processing clusters,” each of which features four “streaming multiprocessors (SMs).” For each of these SMs, there will be a respective geometry setup and processing unit called a Polymorph Engine, which will handle vertex fetch, tessellation, setup, geometry stream output, and view transform.

The four SMs, featuring 32 shader cores, or “CUDA processors,” have a common raster engine unit, and the cores of the SMs have 64KB of L1 cache. The communication amongst the cores is established via 48 ROPS which are attached to 768KB of L2 cache – the most capable cache thus far by Nvidia, and boasting complete read/write access.

Connected with the main memory bus bandwidth, the huge pool of L2 cache is used by the chip for the sharing of data between the 16 SM units – thus marking a departure from the massive crossbar architecture.

Overall, the full GF100 chip features a 384-bit GDDR5 memory interface; 8 ROPs and 128KB of L2 cache for each 64-bit memory interface. However, the chip’s scaled-back version will probably have a 256-bit memory interface, with 32 ROPs and 512KB of L2 cache.

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